
220
XMEGA A [MANUAL]
8077I–AVR–11/2012
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to zero
when this register is written.
Bit 2
– ACKACT: Acknowledge Action
This bit defines the slave's acknowledge behavior after an address or data byte is received from the master. The
acknowledge action is executed when a command is written to the CMD bits. If the SMEN bit in the CTRLA register is
set, the acknowledge action is performed when the DATA register is read.
Table 19-7. TWI slave acknowledge actions.
Bit 1:0
– CMD[1:0]: Command
Writing these bits trigger the slave operation as defined by
Table 19-8 on page 220. The CMD bits are strobe bits and
always read as zero. The operation is dependent on the slave interrupt flags, DIF and APIF. The acknowledge action is
only executed when the slave receives data bytes or address byte from the master
Table 19-8. TWI slave command.
Writing the CMD bits will automatically clear the slave interrupt flags and CLKHOLD, and release the SCL line. The
ACKACT bit and CMD bits can be written at the same time, and then the acknowledge action will be updated before the
command is triggered.
ACKACT
Action
0
Send ACK
1
Send NACK
CMD[1:0]
Group
Configuration
DIR
Operation
00
NOACT
X
No action
01
X
Reserved
10
COMPLETE
Used to complete transaction
0
Execute acknowledge action succeeded by waiting for any START (S/Sr) condition
1
Wait for any START (S/Sr) condition
11
RESPONSE
Used in response to an address byte (APIF is set)
0
Execute acknowledge action succeeded by reception of next byte
1
Execute acknowledge action succeeded by DIF being set
Used in response to a data byte (DIF is set
)
0
Execute acknowledge action succeeded by waiting for the next byte
1
No operation